低成本的FPGA和CPLD方案使你赢得竞争激烈的市场Altera

简介：

问：贵公司的EPF10K30E手册上说，可以用它来构造双端口RAM但，我在实际的使用时发现，它并不能支持标准的端口，用它构建的双断口延时长达3个时钟周期，请问我应该怎么用它来构建标准的双端口RAM。
谢谢！
答： EPF10K30E的EAB(专门的存储单元)能支持简单的双端口的RAM(分开的读写地址和读写使能控制),如要实现真双端口的RAM,它会用多个EAB组合实现.
CYCLONE器件具有我们最先进的RAM功能,能很好的支持真双端口功能.

问：如何实现FPGA的双向口？内部是否有可以直接使用的双向口？
答： each io of ALTERA FPGA have internal bidirectional buffer.However,you need to configure it in your souce design correctly.or you can directly call ALTERA lpm.

问：在应用Cyclone，进行时序分析register-to-register fmax时发现如果两个regiser的时钟是由同一个时钟产生的并不完会相同的CLK，就会提示此高频时钟在这两个register之间clock skew>data delay，请问这是由什么引起的，有什么解决办法吗
答： You may contact our distributor to help on this, you need to adjust some QII setting to fix it.

问：什么是软核处理器？它的速度有通常的处理器快吗？软件许可证费用多少？
答： The soft processor is different from hard core, which implement with a couple of HDL file, and can be used in any device of altera families. And the performance depends on the device families you select. The customer doesn"t need ot be charged for the

问：FPGA设计低电压集成电路时应注意什么？
答： There are quite a few things to be considered when doing an FPGA design.  For example, physically, you should consider the the i/o standards(lvttl, lvds, lvcmos, etc), core voltgae of your board.  Logically, you should consider what fma

问：什么是Cyclone 器件系列？
答： Altera's new Cyclone device family is the world's lowest-cost FPGA. Designed to make the benefits of programmable logic more accessible to a broader market, Altera developed Cyclone devices specifically for high-volume applications that previously were dri

问：demo board 的以太网口支持那些协议
答： 支持10M/100M 以太网协议

问：请问：Nios软嵌入RISC处理器在功能和开发上与一般的RISC处理器相比有那些优势，真的能吸引开发人员转向它吗？
答： NIOS has the following advantages compare to standalone processor:  1.  NIOS is a soft core, can be ported to future FPGA architectures and will not stop production (other standalone will stop production).  2. NIOS provides wi

问：现在Cyclone的国内供货情况怎样 ，
对于小批量（<1000pcs），价格是否相对同等LE容量的ACEX系列有优势？
答： At present, delivery time is short 3-4 weeks is possible and up to customer requirement .

For small qty like 1000pcs, may up to ACEX depends on application .

问：在选择和DSP搭配使用时，什么时候用CPLD，什么时候用FPGA比较合适？
答： For low density DSP processor control signals distribution, address decoding, use CPLD.  For complex DSP processor interfacing with external ASSP, use FPGA.  Or if you need to implement DSP coprocessing function, FPGA is more suitable a