XILINX ISE5.1i -新的软件技术Xilinx

简介：这种新的软件技术，能进行真正的增量设计，保存未修改模块的性能，使风险降至最低并加快了设计编译时间；提升了PACE（管脚和区块约束编辑器）管理工具，简化了器件I/O口、交互电压组和差分对鉴别指南的规格；它的结构向导（Architecture wizards）简化了业界最快的multi-Gbps串行transceiver和片上数字时钟管理功能的设计。

问：ISE5.1i相对4.1i主要有哪些性能的提高或者功能上的增加？
Xilinx的Foundation不能在P4的机器上安装使用，是不是以后就不推新版本了，而以ISE全面替代之？

谢谢！
答： You are right. Foundation is already obsoleted after 4.2i and is replaced by ISE.

问：我们实验室由于科研需要购买Xilinx的FPGA产品，请问能不能附送5.1的开发软件？？
答： Xilinx offer ISE5.1i evaluation kit, please contact with your Xilinx rep for details.

问：毛刺有何比较好的消除方法。实现加法，利用ieee.std_logic_signed.all中的‘+‘，a<=b+c;是否是最佳方案。还是需要另外自己编加的程序。流水线如何实现？
答： Glitches arises from multiple input signals changing simultaneously in a combinatoral logic. The greatest impact of glitches in a synchronous design is when you have glitches on your clock signal. The usual way to avoid this is to remove any gated clock de

问：（1）请问ise5.1支持virtex系列FPGA吗
设计流程用xst好，还是fpga express好，二者主要功能差别是什么
答： ISE5.1i supports Virtex series.

In ISE5.1i, Xilinx no longer offer FPGA Express.  Base on our benchmark data, XST 5.1 achieve significant performance improvement as compare to previous release synthesizer.

问：ISE5.1i 与ISE4.x相比在使用vhdl方面由什麽提高(速度，优化能力)？支持verilogHDL吗?有没有与pcb工具交互的能力？比如采用
FPGA引脚很多，有时需要修改原理图（即floorpin editor）重新与引脚匹配，有没有直接在pcb上修改网表导入ISE5.1i 验证能否这样
修改的功能？

答： ISE5.1i is the latest version of our software which have a lot of improvements in speed and performance compare to previous versions. Verilog HDL is definiely supported. Currently we don"t provide any interface with PCB layout tools. However in 5.1i,

问：目前XILINX的FPGA芯片支持的时钟速率最快能达到多少MHz呢？

答： For latest product series, it"s about 400MHz

问：请问信号通过芯片内部布线节点时产生延时吗?
答： You have delay when you go through every pieces of routing resource in the FPGA. Detailed timing information can be found in the datasheet as well as the post-payout timing report.

问：作为设计人员用ISE5.1I怎样运用高层的抽象模式定义系统来设计的预定要求?谢谢
答： Xilinx is also puting lots of effort in enhancing High Level Architecture Synthesis, meaning that we are ofering tools that will support "C" or "Java" based deign entry.  By specifing your design at that level, our tool can as

问：ise 5.1i是否可以使用MATLAB6.5来做仿真？
答： I assume you are working on DSP type design and using Matlab and Xilinx System Generator for DSP. You can build your DSP model with Matlab/Simulink and System Generator and do your system level simulation. Then, from System Generator you can generate synth

问：我一直使用的是ISE4.1，现在我想使用新的软件5.1，在5.1中软件的使用变化大吗？需要安装第三方的软件吗 ？
答： Assuming you are not using the ISE Foundation series, there is no big different in GUI of ISE4.1i and ISE5.1i.  Other MXE, for most of the design activities, you don"t need to install any 3rd party tools.